A Study of Plasma Induced Damage Monitor by Contact Slot Floating Gate Coupling in advanced FinFET Logic CMOS Technology
碩士 === 國立清華大學 === 電子工程研究所 === 103 === Semiconductor manufacturing technology has followed the prediction of Moore’s Law in past decades, and the size of transistors scaled down continually. To overcome the issue of leakage current and the on current level, researchers come up with new structures and...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2015
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| Online Access: | http://ndltd.ncl.edu.tw/handle/yp85t5 |