Accelerating OpenFlow Switches with Per-Port Cache
碩士 === 國立清華大學 === 資訊工程學系 === 103 === We propose a cache design for an OpenFlow switch which implements datapath in hardware and search engine in software. By analyzing some of National Tsing Hua University traffic records from the Computer and Communication Center, we observe that flows and switch p...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2015
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| Online Access: | http://ndltd.ncl.edu.tw/handle/69308080480290172959 |