Back-contact photovoltaic device realized by standard CMOS foundry process and its application

• Main Authors: Chun-lin Chung, 鐘俊麟
• Other Authors: Yung-Jr Hung
• Format: Others
• Language: zh-TW
• Published: 2015
• Online Access: http://ndltd.ncl.edu.tw/handle/3x9z8b

碩士 === 國立中山大學 === 光電工程學系研究所 === 103 === In this thesis, an interdigitated back-contact photovoltaic device is realized by high-resolution doping and multi-layer interconnections provided by standard bulk CMOS processes. Since the device designs strictly follow the standard CMOS process procedures, this photovoltaic device can be directly integrated with other microelectronic circuits to realize a self-powered system. In general, the starting silicon wafer for CMOS usually has a high-lifetime denuded zone within 10-20 microns from the surface and a low-lifetime bulk with high defect densities. Such a thick and high-resistivity silicon wafer having a non-uniform bulk material lifetime is detrimental to photovoltaic device performance since the entire volume of the wafer is involved in cell operation. In order to boost the photocurrent collection efficiency, we develop an in-house post grinding process to thin down the substrate in order to increase the conversion efficiency to >10 % and a generated electrical power of 0.13 mW/mm2. With the help of maximized interdigitated junction design and metal reflective mirrors, the proposed photovoltaic device is able to provide a conversion efficiency of up to 20 %. For surface antireflection technique, the device is rinsed in a TMAH solution to create pyramid structures atop planar silicon surface, thus leading to reduced surface reflectivity from originally 30~40 % to only 2 % and an improved device efficiency by 9 %.