Implementation on Wideband Low Noise Amplifier for 5-11 GHz and 5 GHz/11 GHz Dual Band Low Noise Amplifier Applications
碩士 === 國立中央大學 === 電機工程學系 === 103 === The primary target of this thesis is to design wideband and dual band low noise amplifier. There are three different circuit designs which are developed in tsmcTM CMOS 0.18 μm and UMC CMOS 0.18 μm. The first circuit is a wideband LNA which employs current-reused...
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| Format: | Others |
| Language: | zh-TW |
| Published: |
2015
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| Online Access: | http://ndltd.ncl.edu.tw/handle/tk78c2 |
| Summary: | 碩士 === 國立中央大學 === 電機工程學系 === 103 === The primary target of this thesis is to design wideband and dual band low noise amplifier. There are three different circuit designs which are developed in tsmcTM CMOS 0.18 μm and UMC CMOS 0.18 μm.
The first circuit is a wideband LNA which employs current-reused and shunt peaking techniques to reduce the power consumption. The input matching adopts T-type and RC feedback to achieve impedance matching. The proposed LNA achieves a gain of 12.67 dB over a 3-dB bandwidth from 3.9 to 14.7 GHz and a minimum noise figure of 4.04 dB. The measured P1dB is -13 dBm and the IIP3 is -3 dBm. The power consumption of the LNA is 7.92 mW. The chip size is 1.114×0.769mm2.
The second circuit is a two-stage wideband low noise amplifier. The first stage used cascade topology to enhance the performance of both gain and isolation. Three transformers instead of individual inductor are used to save the chip area. The proposed LNA achieves a gain of 14.5 dB over a 3-dB bandwidth from 4.9 to 11.3 GHz and a minimum noise figure of 3.18 dB. The measured P1dB is -16 dBm and the IIP3 is -6 dBm. The power consumption is 6.6 mW. The chip size is 0.83×0.95 mm2.
The final LNA is a dual band low noise amplifier with cascade and shunt peaking topology. The input and inter stage matching networks are realized by transformers to obtain dual band responses which is a bandstop filter between the two pass bands. The proposed LNA achieves the gains of 15.1 dB/10.7 dB over a 3-dB bandwidths from 4.75 to 6.15 GHz/9.45 to 12.4 GHz. The P1dB of dual band LNA are -18 dBm /-12 dBm and the IIP3 are -8 dBm/-3dBm at 5.5 GHz and 11 GHz. The minimum NFs are 4.3 dB/5.8 dB, respectively. The power consumption is 9.6 mW and the chip size is 1.31×0.9795 mm2.
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