| Summary: | 碩士 === 國立交通大學 === 機械工程系所 === 103 === This thesis presents a high side gate drive circuit in conjunction with under-voltage lockout circuit for GaN transistors. This gate driver circuit design uses the bootstrap techniques to implement the functionality for the high side gate driver, which not only improve the switching speed but also reduce the cost.
The achievements in this research work other than existing works in this line include the improvements of the existing gate driver design and the incorporation of an under-voltage lockout circuit (UVLO). The improvement of the existing design include (1) the modification of the level shifter to save the power consumption; (2) the modification of the “start-up” module so that the gate driver circuit can function properly without special arrangement on the sequencing of various control signals. This modification also enables the collaboration of the high side gate driver design with the UVLO control module.
Both gate driver and UVLO circuit are designed and simulated using HSPICE, and then implemented using discrete circuit components. Experimental results show that the proposed high side gate driver circuit (not including the UVLO) can drive the GaN transistors at 150V/100kHz. The UVLO module can realize the hysteresis effect to switch the output signal when the input signal is 4.5V and 4V, which is roughly the same as what is designed. When combining the UVLO circuit and high side gate driver design, the combined circuit show the designated performance to drive the GaN transistor at 48V/10kHz. However, due to the limited bandwidth of the UVLO, the combined circuit do not show the hysteresis effect at the designated voltage.
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