A High Power Conversion Efficiency AC/DC Power Module for Liquid Crystal Display Television System

• Main Authors: Chiu, Chao-Chang, 邱昭彰
• Other Authors: Chen, Ke-Horng
• Format: Others
• Language: en_US
• Published: 2014
• Online Access: http://ndltd.ncl.edu.tw/handle/84y8t8

博士 === 國立交通大學 === 電控工程研究所 === 103 === This thesis presents an AC/DC power module, composed of buck-type power factor correction (PFC) converter, primary side regulation (PSR) converter, and secondary side flexible voltage scaling (FVS) converter, for liquid crystal display (LCD) television (TV) system. First of all, the proposed buck-type PFC converter modulates the input current by the sine square modulation mechanism (SSCM) to shape the input AC current as sine wave and thus in-phase with input AC source. Moreover, high total harmonic distortion (THD) in conventional dead angle problem in buck-type PFC can be reduced by the proposed line voltage rebuilt (LVR) technique. Conventional line current is zero in dead angle period and the detected line voltage contains the output voltage information. Therefore, the proposed LVR technique rebuilds the line voltage to remove the offset problem for reducing THD. Second, the proposed PSR converter not only provides the standby power for TV system but also directly charges the battery by the AC source. The PSR converter removes the feedback network in conventional flyback converters. The proposed self-calibrated knee voltage detector (SC-KVD) accurately senses the output voltage information by an auxiliary winding. Moreover, the test chip fabricated in 0.5μm 500V UHV process can be powered on directly by the AC source for high efficiency and compact size through the use of 500V ultra-high voltage device. Third, the proposed secondary side FVS converter moves the controller of flyback converter from the primary side to the secondary side. The proposed overall power management (OPM) in TV system can improve overall conversion efficiency by the flexible voltage scaling (FVS) technique in cooperation with conventional dynamic voltage scaling (DVS) technique. The test chips of the buck-type PFC converter, PSR converter and FVS converter were fabricated in 0.5μm ultra-high voltage CMOS process with chip area of 4.75 mm2,3.125mm2 and 4.05 mm2, respectively, to demonstrate the improved performance. Overall performance can show high accuracy, compact size, high flexibility, and high efficiency in this thesis.