Investigation of Low-Temperature Wafer Bonding and Its Applications for 3D Integration
博士 === 國立交通大學 === 電子工程學系 電子研究所 === 103 === In this thesis, novel schemes using low-temperature wafer bonding technology for memory stacking and CMOS imager sensor (CIS) module applications are developed and investigated. One is low-temperature micro-bump and adhesive hybrid wafer bonding with fine...
Main Authors: | , |
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Other Authors: | |
Format: | Others |
Language: | en_US |
Published: |
2014
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Online Access: | http://ndltd.ncl.edu.tw/handle/71917281298790432507 |