| Summary: | 碩士 === 國立暨南國際大學 === 資訊管理學系 === 104 === In the multicore systems, when processors attempt to access shared resources at the same time, resource contention leads to performance degradation. The Non-Uniform Memory Access (NUMA) multicore systems become more popular in order to increase the system scalability. Processor cores accessing memories on other NUMA nodes take longer time than accessing memories on the local node. If a task and its allocated memories are on different NUMA nodes, remote memory access occurs and incurs additional access latency. Many researches develop the contention-aware scheduling mechanisms for decreasing resource contention between the processor cores. However, most of them do not consider the negative effect caused by the kernel’s load-balancing activity. To balance CPUs’ load, the kernel scheduler would migrate tasks across nodes and their allocated memories are not migrated at the same time ordinarily. Inter-node task migration thus may incur the remote memory access latency and reduce system performance.
To reduce resource contention between the processor cores in the NUMA systems, previous work has proposed the Dynamic Task-Aware Scheduling (DTAS) mechanism. In the DTAS mechanism, the processor cores that share system resources are arranged to run tasks with complementary features in order to reduce resource contention. This mechanism sets task types and processor types dynamically. That is, the DTAS scheduler dynamically classifies each task’s type into computing-bound or memory-bound during runtime, then dispatches tasks to the cores with the same type. The scheduler also dynamically adjusts the cores’ types at runtime according to the ratio of the computing-bound tasks to memory-bound tasks running in the system.
In this thesis, we have proposed a Memory-aware Load Balancing (MLB) mechanism for reducing resource contention and remote memory access to enhance the performance of the DTAS mechanism. In our work, we modify the kernel functions about memory allocation to record the information of each task’s memory usage on each NUMA node. We also enhance the task assignment procedure in the Linux kernel scheduler to incorporate the proposed memory-aware load balancing policies. These policies choose suitable tasks for the inter-node load balancing according to tasks’ memory usages and their task types, so that each task has the higher chance to run on the node along with its allocated memory. Experiment results demonstrate that our enhanced DTAS scheduling mechanism with the proposed Memory-aware Load Balancing mechanism outperforms the default Linux kernel scheduler and the original DTAS mechanism by effectively reducing resource contention and remote memory access among processor cores.
|
|---|
