Research on 94- and 160-GHz Millimeter-Wave CMOS / IPD On-Chip Antenna and 94-GHz integrated On-Chip IPD Antenna with CMOS Up/Down Mixer

• Main Authors: Wen-YiRuan, 阮文逸
• Other Authors: Huey-Ru Chuang
• Format: Others
• Language: zh-TW
• Published: 2015
• Online Access: http://ndltd.ncl.edu.tw/handle/13444091076757429044

碩士 === 國立成功大學 === 電腦與通信工程研究所 === 103 === This thesis presents the research of millimeter-wave (MMW) CMOS and IPD on-chip antennas. The designed CMOS and IPD MMW on-chip antennas are fabricated with TSMC 90-nm CMOS standard process and AFSC integrated passive device (IPD) process, respectively. The three-dimensional (3D) EM simulator HFSS is used for design and simulation. The designed MMW on-chip antennas including: (1) 160-GHz CMOS on-chip artificial magnetic conductor (AMC) dipole antenna with integrated balun-bandpass filter; (2) 94-GHz IPD quasi-Yagi antenna with folded dipole driver; (3) 94-GHz IPD bandpass-filtering 1×2 folded dipole antenna array; (4) 94-GHz IPD 1×2 folded dipole antenna array integrated with CMOS up/down-conversion single-ended sub-harmonic resistive mixer. The measured performances of the designed on-chip antennas are all conducted by the on-wafer measurement setup.