Summary: | 碩士 === 明新科技大學 === 電子工程系碩士班 === 103 === Semiconductor uses the mechanism that the channel is strongly reversed to conduct Source and Drain. As the length of the channel is shorten, the rest part of the substrate, except the to-be-strongly-inversed part close to the gate oxide, becomes so leaky that the conventional device is no longer controllable. Instead, the 3-D channel of FinFET looking like a fin can be simultaneously strongly-inversed and used as a barrier that would protect the device from being leaky. The channel length can then be any shorter beyond 4nm. It is so promising that 28nm, 20nm, 16nm, 14nm, 10nm, and even 7nm are on the road. The barrier is formed because of being fully depleted in the fin. One thus focuses on the electrical performances of FinFET devices by fitting the characteristic curves coming from the measurement. Some meaning engineering quantities can then be abstracted and studied.
Moreover, radio-frequency integrated circuit using Agilent Design System (ADS) on Low Noise Amplifier (LNA) is posed to especially look at the impedance matching. RFIC with central frequencies, such as 5.8GHz, 6.0GHz, 6.4GHz, 6.5GHz, and 7.0GHz, are exactly tuned to reach the corresponding zero reflective coefficients, which appear at the center of Smith Chart. In the matching procedure, inductor and capacitor in parallel or in series are added to match the standard value which is 50Ohm. The relation between Gamma (reflective coefficients) and the impedance were examined carefully, and the moving Gamma is tracked, too.
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