An efficient manager for decoded picture buffer (DPB)based on scalable high-efficiency video coding (SHVC)standard and DSP implementation.

• Main Authors: Yen-Tzu Liao, 廖彥慈
• Other Authors: Chou-Chen Wang
• Format: Others
• Language: zh-TW
• Published: 2015
• Online Access: http://ndltd.ncl.edu.tw/handle/91436200466893650187

碩士 === 義守大學 === 電子工程學系 === 103 === With the rapid development of electronic technology, the ultrahigh definition (UHD) resolution of 4Kx2K (or 8Kx4K) will become the main video applications in future. Therefore, the JCT-VC has been developed a newest high efficiency video coding (HEVC) to satisfy the UHD requirement in 2010, and the first version of HEVC was approved as ITU-T H.265 in Jan. 2013. To upgrade the HEVC used in heterogeneous access networks, the JCT-VC has been approved scalable extension of HEVC (SHVC) in July 2014. Based on the HEVC, the SHVC scheme supports multi-loop solutions by enabling different inter-layer prediction mechanisms. In multi-loop architecture, a full decoding loop takes place in every intermedia layer needed to decode a target layer. Although the multi-loop decoding architecture (MLDA) can achieve higher coding efficiency than the single-loop decoding architecture (SLDA), MLDR increases the decoded picture buffer (DPB) size and memory bandwidth for motion compensation (MC) on the decoder side. This leads to the reduction of decoded performance for SHVC. In order to reduce the DPB size of SHVC decoder, Su et al. recently proposed a dynamic virtual DPB (DV-DPB) assigning algorithm which exploits inter-layer correlation between base layer (BL) and enhancement layer (EL) to predict the decoded picture to save the DPB size [17]. However, the DV-DPB algorithm is ineffective for video sequences with large and active motion. To further save the DPB size of SHVC, we design a virtual DPB manager (VDPBM) to control and storage the parameters and encoding data in this thesis. Firstly, the VDPBM divides DPB into two types of static DPB (S-DPB) and dynamic DPB (D-DPB). The S-DPB mainly stores the key decoded pictures for BL and ELs, and the D-DPB records the index parameter of current decoding unit. Secondly, the VDPBM sets S-DPB size according to the size of the group of picture (GOP) and the number of reference pictures. Thirdly, the VDPBM decides D-DPB size by analyzing the sum of absolute difference (SAD) between the current decoded frame and the reference frame. For fast and accurate finding the predicted CTU, we adopt well-known three step search algorithm (TSSA) to reach the target. Finally, a threshold of SAD is set to check whether it is good enough for reference frame in the VDPBM. If it is less than the threshold, only record the index parameter of current encoding CTU in D-DPB. In addition, to further achieve the DSP realization for the proposed SHVC decoder, we embed the codec on the ADSP-BF548. We re-allocate the function of consuming module from L3 DDR-RAM to L1 and L2 SRAM to speed up the decoding time of SHVC. Experimental results show that the proposed method can achieve an average memory saving ratio (MSR) about 33.36%. Moreover the quality of picture has less change of PSNR. Compared with DV-DPB algorithm, the VDPBM can further achieve an average MSR about 7.7%. In addition, the proposed method can dynamically control the DPB to save memory size according to the characteristics of video sequence.