A Research on Power Saving of Multi-Bit Flip-Flop

• Main Authors: Sheng-Wei Tai, 戴勝威
• Other Authors: Chih-Hu Wang
• Format: Others
• Language: zh-TW
• Published: 2015
• Online Access: http://ndltd.ncl.edu.tw/handle/41699403107649148775

碩士 === 中華大學 === 電機工程學系碩士班 === 103 === The energy saving topic is very important in the world, which it has been discussed widely and deeply. A lot of engineers are constantly trying to find ways and circuit architectures for power saving of electronic¬ products, including automobile electronics, home appliances, mobile devices or green energy house. Many digital integrated circuits will be used in modern electronic products. Their own power consumption could be reduced if the powers of VLSI is saved. For these reasons above, an approach for power saving of VLSI is pro-posed in this thesis. We present a way to reduce integrated circuit power con-sumption using multi-bit flip-flops. Especially the whole clock network will have a serious impact in the dynamic switching. And comparing the brought in different ways design power consumption differences. The experimental results are better energy savings than prior designs.