Implementation of Frequency Multiplication Generator Based on Direct Digital Frequency Synthesizer

• Main Authors: TSENE, SHIH-YING, 曾世穎
• Other Authors: LIN, KUO-JEN
• Format: Others
• Language: zh-TW
• Published: 2014
• Online Access: http://ndltd.ncl.edu.tw/handle/13499400313505140741

碩士 === 中華大學 === 電機工程學系碩士班 === 103 === Direct digital frequency synthesizers (DDFS) with the development of communication systems have caused attention. The advantages of direct digital frequency synthesizer are accurate frequency resolution, fast frequency switching, less phase noise, and high frequency spectrum purity characteristic. We can use the size of the memory, circuit area and a fine frequency resolution to evaluate its effectiveness. Traditional frequency synthesizers are divided into DDFS and analog frequency synthesizer. However, inefficient and unable simultaneously output multiple frequencies are their shortcomings. In this thesis, we adopt a pipeline method to design DDFS. We enhance the performance of simultaneously output multiple frequencies and achieve a good high spectral purity. In this thesis, we use the Matlab 7.10.0 and ISE 13.3 synthesis softwares. The MATLAB model simulation is applied first and implemented with Verilog. Finally, the model is simulated in Modelsim6.3. The maximum spurious free dynamic signal range (SFDR) are from 81.4 dBc to 84.3 dBc.