Hardware Architecture Design for the Joint Precoding Sub-System and Detection Preprocessor in IEEE 802.11n/ac WLAN

• Main Authors: Cheng-Hsing Tseng, 曾承興
• Other Authors: Tsung-Hsien Liu
• Format: Others
• Language: zh-TW
• Published: 2015
• Online Access: http://ndltd.ncl.edu.tw/handle/jtwz9y

碩士 === 國立中正大學 === 通訊工程研究所 === 103 === As the wireless communication prevails, various multiple input multiple output with orthogonal frequency division multiplexing (MIMO-OFDM)techniques have attracted much attention in recent years. This thesis puts emphasis on the precoding, which is one of the MIMO techniques. The antenna configuration under consideration includes two transmit antennas and four receive antennas. Adopted by the IEEE 802.11n/ac standard, the studied precoding system requires the receiver to feedback the angles that represent the right singular vectors of the channel matrix to the transmitter side. To reduce the amount of feedback bits, the angles are quantized with indices to be feedback. Thus, algorithm and hardware architecture for the precoding used in the IEEE 802.11n/ac standard are studied. Since quantized angles are feedback, the equivalent channel also digresses from its optimal value. For this reason, the optimal linear equalizer is inappropriate. Tree search detector is therefore considered for this practical precoding system. In this thesis, joint hardware design for both precoding system and detection preprocessor QR-decomposition is studied. The designed hardware architecture was synthesized and verified in the Xilinx ISE 12.2 environment and also synthesized by Design Compiler. The designed architecture requires 119.89K gates and work with frequency 120MHz under the TSMC 90nm technology.