A Digital-to-Time Converter Using Current-Starving Technology

• Main Authors: Chia-Hen Chang, 張家恆
• Other Authors: Chun-Wei Lin
• Format: Others
• Language: zh-TW
• Published: 2014
• Online Access: http://ndltd.ncl.edu.tw/handle/xs2ev9

碩士 === 國立雲林科技大學 === 電子工程系 === 102 === This work proposed Digital-to-Time Converter, which can by external input digital signal to control pulse delay time after a delay unit. External digital signal converted into an analog voltage signal by circuit. Then the analog voltage signal to control a discharge path of the delay units to achieve the time delay variation. Digital-to-Voltage Converter divides voltage by multi-component ratio of MOS and voltage is summed by adder of OPA. Voltage to current conversion process requires make the voltage versus current is inverse relationship in voltage-to-time converter. The method is using operate in the linear region of MOS and consider the mobility degeneration to generate current. The relationship of voltage versus current is approximate inverse relationship to correct current versus time inverse relationship. So that voltage versus delay time is linear relationship. Achieve to control delay time by digital signal. This work is implemented by TSMC 0.35um 3.3V CMOS process. Operational range of Voltage-to-Time Converter can reach 2.5V. Integral nonlinearity of Digital-to-Voltage Converter is +0.14/-0.12 LSB, and Integral nonlinearity of Digital-to-Time Converter is +0.524/-0.621 LSB.