An Ultra-Low Power Multi-Rate FSK Receiver in 0.18 μm CMOS Process.

碩士 === 淡江大學 === 電機工程學系碩士班 === 102 === An ultra-low power (ULP) frequency shift keying (FSK) receiver had be applied for wearable or implantable physiology sensors in recent years. Comparing to the other signal modulation, FSK provides better immunity against interference. Therefore, the ULP FSK rece...

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Bibliographic Details
Main Authors: Chun-Hung Wang, 王俊鴻
Other Authors: Horng-Yuan Shih
Format: Others
Language:zh-TW
Published: 2014
Online Access:http://ndltd.ncl.edu.tw/handle/776y4y
Description
Summary:碩士 === 淡江大學 === 電機工程學系碩士班 === 102 === An ultra-low power (ULP) frequency shift keying (FSK) receiver had be applied for wearable or implantable physiology sensors in recent years. Comparing to the other signal modulation, FSK provides better immunity against interference. Therefore, the ULP FSK receiver is suitable to provide stable link quality and extend life time of sensors. In this paper, we propose an ultra-low power, high data rate and variable data rate FSK receiver. The ULP FSK receiver was combined by a ULP Front-end and a ULP demodulator. Otherwise, we use current-mode phase shifter to improve bandwidth of the demodulator. High energy efficiency can be achieved by reducing the energy consumption per received bit of FSK receiver. Owing to variable data rate of the FSK demodulator, the power consumption of the FSK receiver can be trade-off for optimization under different operating conditions. The ULP FSK receiver was implemented in 0.18 μm CMOS process. The simulated maximum data rate is 20 Mb/s under power consumption of 1.44 mW. Therefore, the minimum energy consumption of 72 pJ per received bit can be achieved under maximum data rate of 20 Mb/s.