Optimized Layout Designs and Characterization of RF LDMOS Transistors
碩士 === 國立臺北科技大學 === 電腦與通訊研究所 === 102 === In this thesis, we investigate RF LDMOS performances with various layout structures. LDMOS transistors with wide-drain layouts and different field plate structures were fabricated using standard CMOS process. By measuring and analyzing DC, S-parameter and pow...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2014
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| Online Access: | http://ndltd.ncl.edu.tw/handle/24ggk5 |