Hierarchical Binary Multilevel Coset Codes with Interblock Memory
碩士 === 國立臺北科技大學 === 電機工程系所 === 102 === By using the multilevel coset coding scheme, a long code can be constructed from several short codes in conjunction with coset codes so that the tellis complexity can be decreased. In this thesis, we propose a modified hierarchical binary multilevel coset codin...
Main Authors: | , |
---|---|
Other Authors: | |
Format: | Others |
Language: | zh-TW |
Published: |
2014
|
Online Access: | http://ndltd.ncl.edu.tw/handle/a65bwj |
id |
ndltd-TW-102TIT05442052 |
---|---|
record_format |
oai_dc |
spelling |
ndltd-TW-102TIT054420522019-05-15T21:42:32Z http://ndltd.ncl.edu.tw/handle/a65bwj Hierarchical Binary Multilevel Coset Codes with Interblock Memory 具區段記憶階層式二元多階層陪集碼 Hung-Ta Chien 簡宏達 碩士 國立臺北科技大學 電機工程系所 102 By using the multilevel coset coding scheme, a long code can be constructed from several short codes in conjunction with coset codes so that the tellis complexity can be decreased. In this thesis, we propose a modified hierarchical binary multilevel coset coding scheme. The outer codes of the original multilevel coset coding scheme are also designed by using the multilevel coding to further reduce the trellis complexity. Moreover, interblock memory between adjacent blocks is added to increase the coding rate without decreasing the minimum Hamming distance. The simulation results show that the proposed scheme can achieve significant coding gains with low trellis complexity. Shang-Chih Ma 馬尚智 2014 學位論文 ; thesis 44 zh-TW |
collection |
NDLTD |
language |
zh-TW |
format |
Others
|
sources |
NDLTD |
description |
碩士 === 國立臺北科技大學 === 電機工程系所 === 102 === By using the multilevel coset coding scheme, a long code can be constructed from several short codes in conjunction with coset codes so that the tellis complexity can be decreased. In this thesis, we propose a modified hierarchical binary multilevel coset coding scheme. The outer codes of the original multilevel coset coding scheme are also designed by using the multilevel coding to further reduce the trellis complexity. Moreover, interblock memory between adjacent blocks is added to increase the coding rate without decreasing the minimum Hamming distance. The simulation results show that the proposed scheme can achieve significant coding gains with low trellis complexity.
|
author2 |
Shang-Chih Ma |
author_facet |
Shang-Chih Ma Hung-Ta Chien 簡宏達 |
author |
Hung-Ta Chien 簡宏達 |
spellingShingle |
Hung-Ta Chien 簡宏達 Hierarchical Binary Multilevel Coset Codes with Interblock Memory |
author_sort |
Hung-Ta Chien |
title |
Hierarchical Binary Multilevel Coset Codes with Interblock Memory |
title_short |
Hierarchical Binary Multilevel Coset Codes with Interblock Memory |
title_full |
Hierarchical Binary Multilevel Coset Codes with Interblock Memory |
title_fullStr |
Hierarchical Binary Multilevel Coset Codes with Interblock Memory |
title_full_unstemmed |
Hierarchical Binary Multilevel Coset Codes with Interblock Memory |
title_sort |
hierarchical binary multilevel coset codes with interblock memory |
publishDate |
2014 |
url |
http://ndltd.ncl.edu.tw/handle/a65bwj |
work_keys_str_mv |
AT hungtachien hierarchicalbinarymultilevelcosetcodeswithinterblockmemory AT jiǎnhóngdá hierarchicalbinarymultilevelcosetcodeswithinterblockmemory AT hungtachien jùqūduànjìyìjiēcéngshìèryuánduōjiēcéngpéijímǎ AT jiǎnhóngdá jùqūduànjìyìjiēcéngshìèryuánduōjiēcéngpéijímǎ |
_version_ |
1719117899158781952 |