| Summary: | 碩士 === 國立臺北科技大學 === 電機工程系所 === 102 === As generally acknowledged, energy saving has two methods. One is to upgrade the efficiency of the product; the other is to improve its power factor and reduce its harmonic distortion. In the power electronics product, the harmonic current affects the power factor and creates the undesired noise and the additional power loss. Therefore, the International Electrotechnical Commission (IEC) released IEC 6100-3-2 harmonics standards in 2001, and accordingly the harmonic limits were described in detail. In these standards, if the electronics product has the output power above 75W, the harmonic test is needed, which measures a single testing device so as to know how much the harmonics affect the power system. Although many active power factor correction topologies are presented to reduce the harmonic distortion to some extent, there still exists a common problem that the input current stops flowing and is distorted in the neighborhood of the zero input voltage. This is due to the forward voltages of the diodes in the bridge rectifier and the capacitor used to filter out high-frequency switching noises. In this study, based on the mention above, the voltage superposition is used without phase adjustment in the input current command and without enlarging the turn-on period of the switch in the vicinity of the zero input voltage, but only with a few components, so as to improve the zero-crossing distortion of the input current, thereby reducing the value of the total harmonic distortion.
|
|---|
