Low Cost UMOS Design, Hspice Macro Model to Fit the ESD Behavior of 5V NMOS, and Integration of LIGBT with 0.35um BCD Technology

碩士 === 亞洲大學 === 資訊工程學系 === 102

Bibliographic Details
Main Author: Hema E P
Other Authors: Gene Sheu
Format: Others
Language:en_US
Published: 2014
Online Access:http://ndltd.ncl.edu.tw/handle/53619690830222938883
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spelling ndltd-TW-102THMU03960092016-03-14T04:13:48Z http://ndltd.ncl.edu.tw/handle/53619690830222938883 Low Cost UMOS Design, Hspice Macro Model to Fit the ESD Behavior of 5V NMOS, and Integration of LIGBT with 0.35um BCD Technology Hema E P 碩士 亞洲大學 資訊工程學系 102 Gene Sheu 許健 2014 學位論文 ; thesis 53 en_US
collection NDLTD
language en_US
format Others
sources NDLTD
description 碩士 === 亞洲大學 === 資訊工程學系 === 102
author2 Gene Sheu
author_facet Gene Sheu
Hema E P
author Hema E P
spellingShingle Hema E P
Low Cost UMOS Design, Hspice Macro Model to Fit the ESD Behavior of 5V NMOS, and Integration of LIGBT with 0.35um BCD Technology
author_sort Hema E P
title Low Cost UMOS Design, Hspice Macro Model to Fit the ESD Behavior of 5V NMOS, and Integration of LIGBT with 0.35um BCD Technology
title_short Low Cost UMOS Design, Hspice Macro Model to Fit the ESD Behavior of 5V NMOS, and Integration of LIGBT with 0.35um BCD Technology
title_full Low Cost UMOS Design, Hspice Macro Model to Fit the ESD Behavior of 5V NMOS, and Integration of LIGBT with 0.35um BCD Technology
title_fullStr Low Cost UMOS Design, Hspice Macro Model to Fit the ESD Behavior of 5V NMOS, and Integration of LIGBT with 0.35um BCD Technology
title_full_unstemmed Low Cost UMOS Design, Hspice Macro Model to Fit the ESD Behavior of 5V NMOS, and Integration of LIGBT with 0.35um BCD Technology
title_sort low cost umos design, hspice macro model to fit the esd behavior of 5v nmos, and integration of ligbt with 0.35um bcd technology
publishDate 2014
url http://ndltd.ncl.edu.tw/handle/53619690830222938883
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