Design of the Ultra Wideband and 24 GHz Low Noise Amplifiers

• Main Authors: Ruei-Nan Lui, 呂瑞男
• Other Authors: Jyh Sheen
• Format: Others
• Language: zh-TW
• Published: 2014
• Online Access: http://ndltd.ncl.edu.tw/handle/j5dr97

碩士 === 國立虎尾科技大學 === 電子工程系碩士班 === 102 === This thesis presents the design of an ultra-wideband low noise amplifier and a 24 GHz low noise amplifier. Both of them using WIN 0.15 μm pHEMT process to design the circuit. This reach adopted resistance feedback, current reused, and cascade architectures. This research compares simulation and measurement results.　 At first, an ultra wideband low noise amplifier was designed for the application of IEEE802.15.3a standard. The adopted structure is the resistance feedback which provides a flat gain, good input impedance match, and better stability condition for the amplifier circuit. The other adopted structure is the current reused were adopted to achieve a high gain and small power consumption. The source degeneration inductors adjust the input impedance matching. The measurement results have gain 15.79 dB~18.72 dB, noise figure 2.68 dB~4.20 dB, input return loss -13.67 dB~-6.41 dB, output return loss -15.48dB~-8.95 dB, and isolation -41.29 dB~-38.36 dB. A voltage source of 4.5 V is applied with power consumption 607.5 mW. In the second part, a low noise amplifier was designed in 24 GHz for a car radar detector. The main circuit architecture using current reused and cascade architectures. The cascade architecture was employed to achieve high gain. Front end using capacitors, inductors, and degeneration inductor to realize the input impedance matching. The output terminal used inductors and capacitors for the output impedance. The low noise amplifier achieve the following simulation results gain 6.41 dB, noise figure 6.21 dB, input return loss -8.53 dB, output return loss -22.44 dB, and isolation -26.49 dB. A voltage source of 1.2 V is applied with power consumption 114.00 mW.