Design of High-Performance Left-handed Resonator VCO and Resistor coupling quadrature VCO
碩士 === 國立臺灣科技大學 === 電子工程系 === 102 === First,thethesis proposes a low phase noise CMOS voltage-controlled oscillator (VCO) using a left-handed (LH) LC network and a switching/tuning varactor pair. The proposed VCO has been implemented with the TSMC 0.18 μm 1P6M CMOS technology and the die area of the...
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ndltd-TW-102NTUS54280352019-05-15T21:13:20Z http://ndltd.ncl.edu.tw/handle/g9zmpe Design of High-Performance Left-handed Resonator VCO and Resistor coupling quadrature VCO 高效能左手共振腔壓控振盪器與電阻耦合四相位壓控振盪器之設計 Wei-chun Hung 洪維君 碩士 國立臺灣科技大學 電子工程系 102 First,thethesis proposes a low phase noise CMOS voltage-controlled oscillator (VCO) using a left-handed (LH) LC network and a switching/tuning varactor pair. The proposed VCO has been implemented with the TSMC 0.18 μm 1P6M CMOS technology and the die area of the oscillator is0.435 × 0.809 mm2. The VCO can generate differential signals in the high (low)-band frequency range of 6.063~6.374(3.85~4.29) GHz.The measuredhigh (low)-band figure of merit (FOM) is -191.3 (-187.0)dBc/Hz. The VCO uses two units of left-handed LC resonator stacked in series, and the LC resonator is in shunt with a pair of cross-coupled transistors to compensate for the loss of LC resonator. Secondly,the thesispresents a new quadrature voltage-controlled oscillator (QVCO), which consists of two cross-coupled voltage-controlled oscillators (VCOs) coupled via tail resistors. The proposed CMOS QVCO has beenimplementedwiththeTSMC 0.18 μm CMOStechnology and the die area is 0.825 × 0.712 mm2.At the supply voltage of 0.9 V, the total power consumption is 2.77 mW. The free-running frequency of the QVCO is tunable from 6.15GHz to 7.27GHz as the tuning voltage is varied from 0.0 V to 2 V. The measured phase noise is -115.6dBc/Hz at 1MHz frequency offset fromthe oscillation frequency of 6.15 GHz. Finally, the thesisevaluates experimentally the RF characteristics of a wide-locking range divide-by-3 injection-locked frequency divider (ILFD) subjected to the hot carrier stress. The ILFD was implemented in the TSMC90nm CMOS process and it uses an n-core cross-coupled VCO with two direct injection nMOSFETs in series. Two p-core cross-coupled MOSFETs rectify dc voltage to bias the bodies of n-core cross-coupled transistors. High supply voltage stresses were applied at room temperature on the ÷3ILFD while the injection FETs are off. The main observed degradation is a decrease of locking range, which is attributed to reduced ILFD output voltage swing with stress. The hot-carrier stress shifts the oscillation frequency, power consumption and phase noise of free-running ILFD. Sheng-Lyang Jang Ching-Wen Hsue 張勝良 徐敬文 2014 學位論文 ; thesis 106 en_US |
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碩士 === 國立臺灣科技大學 === 電子工程系 === 102 === First,thethesis proposes a low phase noise CMOS voltage-controlled oscillator (VCO) using a left-handed (LH) LC network and a switching/tuning varactor pair. The proposed VCO has been implemented with the TSMC 0.18 μm 1P6M CMOS technology and the die area of the oscillator is0.435 × 0.809 mm2. The VCO can generate differential signals in the high (low)-band frequency range of 6.063~6.374(3.85~4.29) GHz.The measuredhigh (low)-band figure of merit (FOM) is -191.3 (-187.0)dBc/Hz. The VCO uses two units of left-handed LC resonator stacked in series, and the LC resonator is in shunt with a pair of cross-coupled transistors to compensate for the loss of LC resonator.
Secondly,the thesispresents a new quadrature voltage-controlled oscillator (QVCO), which consists of two cross-coupled voltage-controlled oscillators (VCOs) coupled via tail resistors. The proposed CMOS QVCO has beenimplementedwiththeTSMC 0.18 μm CMOStechnology and the die area is 0.825 × 0.712 mm2.At the supply voltage of 0.9 V, the total power consumption is 2.77 mW. The free-running frequency of the QVCO is tunable from 6.15GHz to 7.27GHz as the tuning voltage is varied from 0.0 V to 2 V. The measured phase noise is -115.6dBc/Hz at 1MHz frequency offset fromthe oscillation frequency of 6.15 GHz.
Finally, the thesisevaluates experimentally the RF characteristics of a wide-locking range divide-by-3 injection-locked frequency divider (ILFD) subjected to the hot carrier stress. The ILFD was implemented in the TSMC90nm CMOS process and it uses an n-core cross-coupled VCO with two direct injection nMOSFETs in series. Two p-core cross-coupled MOSFETs rectify dc voltage to bias the bodies of n-core cross-coupled transistors. High supply voltage stresses were applied at room temperature on the ÷3ILFD while the injection FETs are off. The main observed degradation is a decrease of locking range, which is attributed to reduced ILFD output voltage swing with stress. The hot-carrier stress shifts the oscillation frequency, power consumption and phase noise of free-running ILFD.
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author2 |
Sheng-Lyang Jang |
author_facet |
Sheng-Lyang Jang Wei-chun Hung 洪維君 |
author |
Wei-chun Hung 洪維君 |
spellingShingle |
Wei-chun Hung 洪維君 Design of High-Performance Left-handed Resonator VCO and Resistor coupling quadrature VCO |
author_sort |
Wei-chun Hung |
title |
Design of High-Performance Left-handed Resonator VCO and Resistor coupling quadrature VCO |
title_short |
Design of High-Performance Left-handed Resonator VCO and Resistor coupling quadrature VCO |
title_full |
Design of High-Performance Left-handed Resonator VCO and Resistor coupling quadrature VCO |
title_fullStr |
Design of High-Performance Left-handed Resonator VCO and Resistor coupling quadrature VCO |
title_full_unstemmed |
Design of High-Performance Left-handed Resonator VCO and Resistor coupling quadrature VCO |
title_sort |
design of high-performance left-handed resonator vco and resistor coupling quadrature vco |
publishDate |
2014 |
url |
http://ndltd.ncl.edu.tw/handle/g9zmpe |
work_keys_str_mv |
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