Design of a Low-power High-bandwidth D-BPSK Wireless Transceiver

• Main Authors: Bang-Cyuan Wang, 王邦全
• Other Authors: 林宗賢
• Format: Others
• Language: en_US
• Published: 2014
• Online Access: http://ndltd.ncl.edu.tw/handle/08694270824959842142

碩士 === 國立臺灣大學 === 電子工程學研究所 === 102 === Wireless communication is more and more important with the development of wearable devices, and the energy efficiency is critical under stringent power budget. Conventional mixer-based architecture suffers from power hungry mixers and frequency synthesizer and has many constraints for bio-medical applications. Phase-selector-based PSK transmitter has been widely proposed to increase energy efficiency and the maximal data rate is up to several tens of Mbps. However, limited by the demodulating architecture, a highly efficient PSK receiver has not yet been published. In this work, an energy-efficient 400-MHz D-BPSK transceiver is proposed. The edge-combining technique is applied to lower the operating frequency of frequency generator in transmitter, and therefore power consumption decreases. The phase-selector-based technique is also used for transmitter to achieve high data rate. The D-BPSK receiver adopts injection-locking technique to perform dynamic phase-to-amplitude conversion, which detects the relative phase transition and the data is therefore demodulated by envelope detector. In this receiver, the phase-tracking loop is not required, which diminishes power consumption and cost. The transceiver is fabricated in TSMC 0.18-μm CMOS technology. The power consumption of transmitter is 0.732 μW, and the EVM is 11%, energy efficiency is 73.2 pJ/bit at maximal data rate 10 Mbps. The receiver consumes 1.66 mW with 0.9-V supply. The sensitivity of receiver is -70.2 dBm, and the energy efficiency is 166 pJ/bit at 10-Mbps data rate.