Design of a Continuous-Time Delta-Sigma Modulator with Single-Amplifier-Biquad (SAB) Filter and TDC-based Quantizer

• Main Authors: Tzu-An Wei, 魏子安
• Other Authors: 林宗賢
• Format: Others
• Language: en_US
• Published: 2014
• Online Access: http://ndltd.ncl.edu.tw/handle/79834095185436019578

碩士 === 國立臺灣大學 === 電子工程學研究所 === 102 === A power-efficient continuous-time delta-sigma modulator (CTDSM) employing a single-amplifier biquad (SAB) based topology is proposed. The modulator incorporates a proposed twin-T SAB topology where the excess loop delay (ELD) is compensated by injecting a feedback signal into an internal node of the SAB while cooperating with an additional phase-compensation resistor. The non-linearity induced by the mismatch of feedback DAC will increase the in-band noise, thus jeopardizing the SNDR. A low-power time-to-digital converter (TDC) with an embedded data-weighted-averaging (DWA) function is proposed as the quantizer, which mitigates the mismatch issue in the feedback DACs. Fabricated in 90-nm CMOS, the proposed CTDSM achieves peak SNDR of 67.2 dB and dynamic range of 73 dB over an 8.5 MHz signal bandwidth, while consuming 4.3 mW at 300 MHz sampling frequency from a power supply of 1.2 V and a dedicated supply of 1.4 V supply for the feedback DAC, and achieve an FoM of 135 fJ/conv-step.