TDC Digital Time Discrimination Technology for Positron Emission Tomography
碩士 === 國立臺灣海洋大學 === 電機工程學系 === 102 === In this thesis, TDC(time-to-digital converter, TDC) digital time logic circuit implemented in Altera’s Stratix II EP2S60F1020C3 FPGA chip has been proposed. It could measure delay time between positive edges of input pulse and internal clock by using build-i...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2014
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| Online Access: | http://ndltd.ncl.edu.tw/handle/cyvh56 |