Chip Clustering with Mutual Information on Multiple Clock Tests and its Application to Yield Tuning

Chip Clustering with Mutual Information on Multiple Clock Tests and its Application to Yield Tuning

碩士 === 國立清華大學 === 電機工程學系 === 102

Bibliographic Details
Main Authors:	Chiang, Jiun-Yi, 江俊毅
Other Authors:	Liou, Jing-Jia
Format:	Others
Language:	en_US
Published:	2014
Online Access:	http://ndltd.ncl.edu.tw/handle/05529026550494230966

Description
Summary:	碩士 === 國立清華大學 === 電機工程學系 === 102