An Effective Threshold Voltage (Vth) Model of Dickson Charge Pump Circuit and its Circuit Area Minimization Design Using Varactor

• Main Authors: Mao, Ningqiang, 毛寧強
• Other Authors: Chang, Mi-Chang
• Format: Others
• Language: en_US
• Published: 2014
• Online Access: http://ndltd.ncl.edu.tw/handle/10398194253478026491

碩士 === 國立清華大學 === 電子工程研究所 === 102 === Charge pump is a kind of DC-DC converter circuit which uses capacitors as energy store elements to create a higher output steady voltage. It’s widely used in voltage converter, power management system and phase lock loop because of its simple circuit structure and high power efficiency. Building the circuit model to do analysis work is helpful for circuit design and optimization. Dickson charge pump circuit is the fundamental and most widely used charge pump circuit. The conventional analytical model based on the Dickson charge pump is studied in this thesis. An improved Dickson charge pump model with an effective Vth parameter is derived in response to the drawbacks of the conventional model (as can’t be used to analysis the effect of MOS width on the circuit performance). The improved model can predict the steady-state output voltage more accurate. As linear capacitor is used as the charging capacitor in the charge pump circuit, the circuit area problem can’t be ignored. Larger circuit area leads to larger costs, so circuit area optimization work should be done on the design of charge pump circuit. In this thesis, to decrease the circuit area, a new design using varactor as the charging capacitor to replace of linear capacitor is derived. An improved area minimization work based on the effective threshold voltage Dickson charge pump model and varator charging capacitor is done on the Dickson charge pump circuit. Circuit which has been done by this area optimized work will have great area advantage compared to the conventional Dickson charge pump circuit which hasn’t been area optimized. In this thesis, all simulations are based on TSMC 0.18um CMOS model. The clock has an amplitude of -1.5V to 1.5V, of which frequency is 100 (KHz) and the duty cycle is 50%. The objective steady-state output voltage is 1.5 (V) and output current is 1 0(uA).