High Speed Read Circuit and I/O Design for 3D Stacked RRAM

High Speed Read Circuit and I/O Design for 3D Stacked RRAM

碩士 === 國立清華大學 === 電子工程研究所 === 102 === 因申請專利緣故，資料延後公開

Bibliographic Details
Main Authors:	Chen, Yi-Wei, 陳翊維
Other Authors:	Chang, Meng-Fan
Format:	Others
Language:	en_US
Published:	2013
Online Access:	http://ndltd.ncl.edu.tw/handle/fqyuu2

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