Design of Low-Power Content-Addressable Memories Using Segmented Match-Line Scheme

碩士 === 國立彰化師範大學 === 電子工程學系 === 102 === Content-addressable memory (CAM) compares input search data in parallel against a table of stored data, and returns the address of the matching data. CAMs can be used in a wide variety of applications requiring high-speed parallel search. These applications inc...

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Bibliographic Details
Main Authors: Bo-Ruei Lin, 林柏瑞
Other Authors: Meng-Chou Chang
Format: Others
Language:zh-TW
Published: 2014
Online Access:http://ndltd.ncl.edu.tw/handle/94066266407475716739
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Summary:碩士 === 國立彰化師範大學 === 電子工程學系 === 102 === Content-addressable memory (CAM) compares input search data in parallel against a table of stored data, and returns the address of the matching data. CAMs can be used in a wide variety of applications requiring high-speed parallel search. These applications include pattern recognition, data compression, and network address translation. The CAM usually consumes a large amount of power. This paper introduces a low-power TCAM design, in which we propose the segmented match-line scheme to reduce the TCAM power dissipated in the match-line. In this scheme, a match-line is divided into many segments, and a transmission gate is placed between two adjacent segments to control whether the two adjacent segments are connected or disconnected. The mask bits of a stored CAM word dynamically control the operation of transmission gates on the associated match-line, and thus the number of match-line segments involved in precharge/discharge is dynamically determined by the prefix length of the stored CAM word. The shorter the prefix length is, the smaller number of segments involves in precharge/discharge, and the less power dissipates.