A High-speed Architecture for Recursive Multipliers
碩士 === 國立彰化師範大學 === 資訊工程學系 === 102 === For high speed multiplier implementation, the recursive architecture is a parallel and modular approach with low complexity. However, compared to the conditional array multiplier, it costs more area due to the interconnection between modules. The multiplexe...
Main Authors: | Yao-Ting Huang, 黃耀霆 |
---|---|
Other Authors: | Po-Yueh Chen |
Format: | Others |
Language: | zh-TW |
Published: |
2014
|
Online Access: | http://ndltd.ncl.edu.tw/handle/cv4uhc |
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