Fabrication and Characterization of Sub-Micron Junctionless ITO TFTs Using Film Profile Engineering

• Main Authors: Huang, Yu-An, 黃宇安
• Other Authors: Lin, Horng-Chih
• Format: Others
• Language: en_US
• Published: 2014
• Online Access: http://ndltd.ncl.edu.tw/handle/99851113261359311419

碩士 === 國立交通大學 === 電子工程學系 電子研究所 === 102 === In this thesis, sub-micron junctionless ITO-based thin-film transistors were fabricated by film profile engineering and characterized for the first time. The junctionless ITO TFTs feature a discrete bottom gate and a channel with smallest length of 0.4 μm. The fabricated ITO TFTs show record-high on/off current ratio of 1010 and low sub-threshold swing of 84 mV/decade. The threshold voltage is 0.39 V, indicating an enhancement-mode TFT. In addition, anomalously high field-effect mobility (> 450 cm2/V-s) is commonly seen from the characteristics of the fabricated devices. Moreover, a unique and interesting counterclockwise hysteresis phenomenon is observed in the IDS-VGS measurements. Charging and discharging of the electron traps located near or at the grain boundaries of the poly-crystalline ITO channel are considered as the origin of the hysteresis and the anomalously high field-effect mobility.