Sigma-Delta Analog to Digital convertor for multi-sensor SOC
碩士 === 國立交通大學 === 電子工程學系 電子研究所 === 102 === In the thesis, we design a high resolution Analog to Digital converter for Multi-sensor SOC. Due to low bandwidth of MEMS applications, the three order feed-forward type SDM is adopted. For high resolution of MEMS application, and it can achieve to 256 of O...
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ndltd-TW-102NCTU54281012016-07-02T04:20:30Z http://ndltd.ncl.edu.tw/handle/62551178322242965116 Sigma-Delta Analog to Digital convertor for multi-sensor SOC 應用於複合性功能感測單晶片之三角積分類比數位轉換器 Liu, Chih-Chun 劉志峻 碩士 國立交通大學 電子工程學系 電子研究所 102 In the thesis, we design a high resolution Analog to Digital converter for Multi-sensor SOC. Due to low bandwidth of MEMS applications, the three order feed-forward type SDM is adopted. For high resolution of MEMS application, and it can achieve to 256 of OSR. When the three order SDM is designed, the non-ideal effect and system stability need to be considered. Therefore, we establish an equivalent behavioral model in MATLAB before circuit design. The behavioral model can help reduce the duration of circuit level simulation. The bandwidth of design specification is 1 KHz under 1.8V of power supply. Finally, it’s power dissipation is 424uW. Chip Area with PAD is 1980x960um^2. The performance of SQNR and DR are 90.9 dB and 94.9 dB respectively, and the resolution of proposed design is 14 bits. Wen, Kuei-Ann 溫瓌岸 2013 學位論文 ; thesis 81 zh-TW |
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碩士 === 國立交通大學 === 電子工程學系 電子研究所 === 102 === In the thesis, we design a high resolution Analog to Digital converter for Multi-sensor SOC. Due to low bandwidth of MEMS applications, the three order feed-forward type SDM is adopted. For high resolution of MEMS application, and it can achieve to 256 of OSR.
When the three order SDM is designed, the non-ideal effect and system stability need to be considered. Therefore, we establish an equivalent behavioral model in MATLAB before circuit design. The behavioral model can help reduce the duration of circuit level simulation.
The bandwidth of design specification is 1 KHz under 1.8V of power supply. Finally, it’s power dissipation is 424uW. Chip Area with PAD is 1980x960um^2. The performance of SQNR and DR are 90.9 dB and 94.9 dB respectively, and the resolution of proposed design is 14 bits.
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Wen, Kuei-Ann |
author_facet |
Wen, Kuei-Ann Liu, Chih-Chun 劉志峻 |
author |
Liu, Chih-Chun 劉志峻 |
spellingShingle |
Liu, Chih-Chun 劉志峻 Sigma-Delta Analog to Digital convertor for multi-sensor SOC |
author_sort |
Liu, Chih-Chun |
title |
Sigma-Delta Analog to Digital convertor for multi-sensor SOC |
title_short |
Sigma-Delta Analog to Digital convertor for multi-sensor SOC |
title_full |
Sigma-Delta Analog to Digital convertor for multi-sensor SOC |
title_fullStr |
Sigma-Delta Analog to Digital convertor for multi-sensor SOC |
title_full_unstemmed |
Sigma-Delta Analog to Digital convertor for multi-sensor SOC |
title_sort |
sigma-delta analog to digital convertor for multi-sensor soc |
publishDate |
2013 |
url |
http://ndltd.ncl.edu.tw/handle/62551178322242965116 |
work_keys_str_mv |
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