| Summary: | 碩士 === 國立交通大學 === 電子工程學系 電子研究所 === 102 === Digital microfluidic biochip (DMFB) is one of the most attractive research topics in recently years. It can substitute for conventional instruments in laboratories which are very expensive and bulky. The mainstream design of DMFBs is the array-based biochip, and its design flow can be divided into two major stages: fluidic-level synthesis and chip-level design. The first part, fluidic-level synthesis, determines the behavior of fluidics on a chip, like operation scheduling, module placement, and droplet routing. In contrast, chip-level design deals with the problems associated with DMFB manufacturing, such as control pin assignment and wire routing. Previous works point out that the existing methods for fluidic-level synthesis do not take care of chip-level design issues and thus cannot guarantee a successful chip-level-design solution. However, in our opinion, the result determined by front-end fluidic-level synthesis step (e.g., operation scheduling) may also make the back-end synthesis step failed (e.g., module placement and droplet routing) owing to their interdependency. To overcome this problem, we propose construct a new versatile ring-based architecture, VERBA, which is adaptive for most bio-applications. Different from array-based DMFBs, VERBA can be utilized as a robust platform for fluidic-level synthesis to achieve one-pass synthesis. Besides, we further propose a storage-aware scheduling algorithm, named SAS, for latency minimization. Experimental results show that VERBA not only guarantee one-pass synthesis but also can behave as well as array-based DMFB by using existing synthesis algorithms. Moreover, SAS can provide even better scheduling result on VERBA. As a result, our architecture VERBA and the corresponding scheduling algorithm SAS is definitely considerable in DMFB design.
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