Summary: | 碩士 === 國立交通大學 === 資訊學院資訊學程 === 102 === In this thesis, an EMD-based breathing signal processing system using FPGA is developed. The system consists of 3 sub-systems including data acquisition, FPGA based EMD accelerator and display system which can shows EMD processing results. A high speed internet links these 3 sub-systems such that low latency, low delay and real time data transportation is achieved. In this work, the four-pipelined EMD accelerator is implemented and FIFO structure is used to reduce the computation delay of Cubic Spline. In terms of accuracy, 38-bit floating point data format is adopted to approach the double-precision floating-point accuracy. An external SSRAM architecture is adopted to process a large amount of data. Comparing the EMD accelerator and 210MHz ARM11 MPcore platform, for 10K data size, the EMD accelerator can performs faster by 29.21 times than ARM11 processor running single core, 20.20 times than ARM11 processor running 2 cores, 15.47 times than ARM11 processor running 4 cores, respectively.
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