The Fabrication and Device Performances of Advanced Graphene Transistors

• Main Authors: Chen, Yan-Hao, 陳彥豪
• Other Authors: Lin, Shih-Yen
• Format: Others
• Language: zh-TW
• Published: 2014
• Online Access: http://ndltd.ncl.edu.tw/handle/78659481941851438623

碩士 === 國立交通大學 === 光電工程研究所 === 102 === Since the graphene ,two-dimensional material, was discovered in 2004, graphene transistors rapidly become a hot topic. Because of its high mobility and good conductivity, graphene can match the goals of high-speed operation, which is importance for the development of high-speed, high-performance transistors. In this thesis, we grow graphene on copper foil by using a low-pressure chemical vapor deposition system. By using difference sample structures, we will investigate the characteristic of graphene transistors. Generally, this thesis can be divided into three parts. Firstly, we will introduce the preparation of graphene films and graphene transistors. Next, we design dual-gated (in-plane and bottom gates) graphene filed-effect transistors and investigate it. We find that it is effective to tune Fermi level in graphene channels by changing the voltages of in-plane gates. Finally, we design one-cut and dual-cut graphene filed effect transistors scraped by using atomic force microscope tips. In these devices, the current is forced to squeeze into the path between the two cuts rather than flow directly through the graphene sheet. We have observed that the gate voltages under minimum current conditions shift toward zero bias as the sizes of the dual-cut regions increase. These results have demonstrated an interesting architecture for device fabrication, Fermi level tuning, and device applications.