A Wafer Start Policy By Loading Of Bottleneck Machine For Semiconductor Fabrication

碩士 === 國立交通大學 === 管理學院工業工程與管理學程 === 102 === This research studies the daily job release policy for a semiconductor wafer fab, operating in a scenario which involves both MTO (make-to-order) and MTS (make-to-stock) orders. The objective of the job release policy is to minimize the work-in-process (WI...

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Main Authors: Wu, Mei-Hui, 吳玫慧
Other Authors: Wu, Muh-Cherng
Format: Others
Language:zh-TW
Published: 2014
Online Access:http://ndltd.ncl.edu.tw/handle/78152964503140949572
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spelling ndltd-TW-102NCTU50310582016-07-02T04:21:06Z http://ndltd.ncl.edu.tw/handle/78152964503140949572 A Wafer Start Policy By Loading Of Bottleneck Machine For Semiconductor Fabrication 以瓶頸機台負荷評估晶圓廠投料決策 Wu, Mei-Hui 吳玫慧 碩士 國立交通大學 管理學院工業工程與管理學程 102 This research studies the daily job release policy for a semiconductor wafer fab, operating in a scenario which involves both MTO (make-to-order) and MTS (make-to-stock) orders. The objective of the job release policy is to minimize the work-in-process (WIP) deviation of the bottleneck workstation, in order to reduce the deviation of cycle time. Four heuristic methods (M-1, M-2, M-3, and M-4) are developed in this study and justified by a simulation program coded in Flexsim (proprietary discrete event simulation software). Simulation results indicate that method M-1, by the ANOVA test, significantly outperforms the other three ones. Wu, Muh-Cherng 巫木誠 2014 學位論文 ; thesis 32 zh-TW
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language zh-TW
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description 碩士 === 國立交通大學 === 管理學院工業工程與管理學程 === 102 === This research studies the daily job release policy for a semiconductor wafer fab, operating in a scenario which involves both MTO (make-to-order) and MTS (make-to-stock) orders. The objective of the job release policy is to minimize the work-in-process (WIP) deviation of the bottleneck workstation, in order to reduce the deviation of cycle time. Four heuristic methods (M-1, M-2, M-3, and M-4) are developed in this study and justified by a simulation program coded in Flexsim (proprietary discrete event simulation software). Simulation results indicate that method M-1, by the ANOVA test, significantly outperforms the other three ones.
author2 Wu, Muh-Cherng
author_facet Wu, Muh-Cherng
Wu, Mei-Hui
吳玫慧
author Wu, Mei-Hui
吳玫慧
spellingShingle Wu, Mei-Hui
吳玫慧
A Wafer Start Policy By Loading Of Bottleneck Machine For Semiconductor Fabrication
author_sort Wu, Mei-Hui
title A Wafer Start Policy By Loading Of Bottleneck Machine For Semiconductor Fabrication
title_short A Wafer Start Policy By Loading Of Bottleneck Machine For Semiconductor Fabrication
title_full A Wafer Start Policy By Loading Of Bottleneck Machine For Semiconductor Fabrication
title_fullStr A Wafer Start Policy By Loading Of Bottleneck Machine For Semiconductor Fabrication
title_full_unstemmed A Wafer Start Policy By Loading Of Bottleneck Machine For Semiconductor Fabrication
title_sort wafer start policy by loading of bottleneck machine for semiconductor fabrication
publishDate 2014
url http://ndltd.ncl.edu.tw/handle/78152964503140949572
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