Position-dependent carriers trapping in organic dielectrics for organic non-volatile memory devices

• Main Authors: Yu-HaoChen, 陳昱豪
• Other Authors: Wei-Yang Chou
• Format: Others
• Language: zh-TW
• Published: 2014
• Online Access: http://ndltd.ncl.edu.tw/handle/68338256873605859808

碩士 === 國立成功大學 === 光電科學與工程學系 === 102 === The relationship between the vertical distribution of carrier-trapping sites in polymer films and the electrical performance of organic N-type non-volatile transistor-type memory devices (ONVMs) was discussed in this study. Two kinds of polymer dielectrics (polyimide, PI) with polar functional groups were used as the charge-trapping layer and the gate-modification layer. PI-20A are charge-trap sites distributed at the bulk of the PI polymer, and PI-20I are charge-trap sites distributed near the surface of the PI films. The drain current of the ONVMs with PI-20I dielectrics was obviously enhanced compared with those of devices with PI-20A dielectrics. This result shows that the abundance of hydroxyl groups at the interface between polymer dielectric layer (PI-20I) and semiconductor layer causes large drain output currents on the devices, which is attributed to an enhanced channel conductance and an amount of accumulated charges by gate-filed induced electrical dipoles. The magnitude of the memory window of ONVMs with PI-20A dielectrics was much larger than those of PI-20I-modified memory devices, which resulted in low hydroxyl group density at the PI-20A/semiconductor interface and easy release of trapped carriers in the PIs during the erasing operation of ONVMs. The above results demonstrate that carriers trapped at different positions of charge-storing sites in the polymer layer causes different memory effects on devices. It provides an ideal route for designing the charge-trapping layer of non-volatile transistor memory devices.