| Summary: | 碩士 === 國立成功大學 === 微電子工程研究所 === 102 === Nowadays, the crystal quality and wall plug efficiency (WPE) of GaN-based blue light-emitting diodes have been significantly improved, because of the continuous advances in metal organic chemical vapor deposition technology and VLED chip processing. For vertical structure GaN-based LEDs (VLEDs), light emission from the n-GaN surface is strongly affected by the cathode electrode pattern which should keep both the contact resistance and light shielding ratio as small as possible.
The advantages of VLED structure are series resistance reduction and WPE increment as compared with the conventional LED structure, however, the current crowding effect would severely decrease the WPE especially at high current condition (〉1 A). In this study, to alleviate the current crowding in VLEDs, a two-step ladder surface morphology using inductive coupled plasma (ICP) etching depth and cathode electrode pattern optimization of top n-GaN layer of VLEDs are proposed to improve the current spreading and the light emission uniformity. The same structure is simulated by the Crosslight simulation tool for verification as well.
The use of inductively coupled plasma (ICP) 2-step mesa etching on the n-GaN layer and optimized cathode electrode pattern were examined both theoretically and experimentally. Good agreements between simulation and experiments are obtained. Our experimental results show that, as compared to regular VLED with flat n-GaN structure and regular electrode, the proposed VLEDs in this paper shows the highest increase in light output power (Lop) by 19.2% at 350 mA. It is expected that the proposed 2-step mesa scheme to improve current spreading in this work could offer potential applications in optoelectronics in the near future.
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