Design and Implementation of Hybrid Memory Device and Switched-Capacitor Step-Down Converter

碩士 === 國立中興大學 === 電機工程學系所 === 102 === Memories are important semiconductor devices. Volatile and non-volatile memories are widely used in various electronic systems. Owing to growing demands of electronic products, the design trends of various types of memories with their peripheral circuits are hig...

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Bibliographic Details
Main Authors: Yi-Lin Chiou, 邱奕霖
Other Authors: Hong-Chin Lin
Format: Others
Language:zh-TW
Published: 2014
Online Access:http://ndltd.ncl.edu.tw/handle/18871453192171844458
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Summary:碩士 === 國立中興大學 === 電機工程學系所 === 102 === Memories are important semiconductor devices. Volatile and non-volatile memories are widely used in various electronic systems. Owing to growing demands of electronic products, the design trends of various types of memories with their peripheral circuits are high-speed, low-cost and high-density. In this thesis, hybrid memory devices are proposed using the standard 0.18m CMOS technology. This device can store non-volatile data and also act as a static random access memory (SRAM) device. It is fully compatible with the standard CMOS technology without additional process steps. Therefore, it can be combined with the logic and analog circuits easily to reduce the fabrication cost and time. Simulation, chip tape-out and measurement were performed. The measurement confirms this memory device can store and erase non-volatile data, as well as read the stored data by the current sensing method. Besides, the non-volatile data can also be read using the built in SRAM structure. For the SRAM mode, the write and read operations work correctly as expected. The proposed hybrid memory devices require various bias voltages for correct operations, thus, the on-chip step-down voltage regulator was also designed. This DC voltage converter uses the switched-capacitor structure and use the low- dropout regulator (LDO) as the output stage. The fractional high to low voltage conversion ratios of switched-capacitor structure provide high energy conversion efficiency, and the LDO minimizes the output ripples produced by the switched capacitors. The converter generates the output voltage of 1.0V at the supply voltage of 3.3V using the 0.18 CMOS technology and the on-chip capacitors. The maximum output loading current is 6.3mA with power efficiency of 56.49%.