Integrated Circuit Design of a Logarithmic Conversion System Based Multiplier

• Main Authors: Shiou-Ting Yeh, 葉修廷
• Other Authors: Kuo Chao Tsung
• Format: Others
• Language: zh-TW
• Published: 2014
• Online Access: http://ndltd.ncl.edu.tw/handle/9gp27b

碩士 === 國立金門大學 === 電子工程學系碩士班 === 102 === Digital Signal Processing(DSP) applications have been widely used in video,3-D graphics, telecommunication and smart Information Technology(IT) consumer electronics products. Many complex arithmetic calculations such as multiplication, division, reciprocal, square-root and power operations are required in DSP technology. Nowadays, logarithmic number system(LNS) can be used to simplify these complex operations using simple shift-and-add operations. LNS-based computing system contains logarithmic conversion unit, simple calculation unit and antilogarithmic conversion unit to the binary values. Many methods about logarithmic conversion to binary system and antilogarithmic converter have been presented in recent years. Logarithmic conversion system includes a Logarithmic converter and Anti-Logarithmic converter. Linear approximation of logarithmic converter and Anti-Logarithmic converter approach will be proposed in this paper, and the error value of our proposed method is smaller than other literature. In hardware area, compared with the previous literature, our proposed approach of the six nonsymmetric region logarithmic conversion module is only required to pay an additional 33% of the hardware costs, and to get 183% of the error reduced. In Anti-Logarithmic converter, our proposed method of the four region Anti-logarithmic conversion module compared with previous literature, we can only have to pay an additional 29.7% of the hardware cost to get 170% error reduced. The integrated circuit design of a logarithmic conversion system based multipliers and designed under TSMC 0.18um process.