Reducing the Standby Power Consumption of the S4 and S3 State for Personal Computer

• Main Authors: Po-Yang Hsu, 許柏洋
• Other Authors: Ying-Wen Bai
• Format: Others
• Language: zh-TW
• Published: 2014
• Online Access: http://ndltd.ncl.edu.tw/handle/26744653586021682764

碩士 === 輔仁大學 === 電機工程學系碩士在職專班 === 102 === Most of the research into saving energy tries to improve the DC to DC power conversion efficiency, uses software control, and manages the power systems. In our design, we modify the traditional S4 and S3 power state and instead use the Deep S4 and S3 power state. We redesign the standby power control circuit to save the power consumption in the standby mode of a PC. First, we recheck the whole power control circuit in the standby mode, and clarify the specific chip in the standby mode which is used both to wake up the system and to turn off any unnecessary chip power. Secondly, we redesign the power sequence and use an additional low power ASIC to control the system's power, in order to allow a normal system operation to turn off the power of all unnecessary control chips. Third, we simplify the multiple remote wake-up mechanism to control the power of the remote wake-up devices, to save the power in the standby mode. As a result, we can reduce the standby power. The S4 and S3 Standby power consumption is reduced from the original 0.22W and 0.62W to 0.06W and 0.16W.