Obstacle-Aware Substrate Routing
碩士 === 中華大學 === 資訊工程學系碩士班 === 102 === Due to the limit of a single routing layer and the existence of inevitable obstacles in flip-chip and PCB designs, single-layer obstacle-aware routing becomes an important issue in RDL routing and bus routing. In this paper, based on the construction of routabil...
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ndltd-TW-102CHPI53920332017-02-17T16:16:41Z http://ndltd.ncl.edu.tw/handle/89425834793757155317 Obstacle-Aware Substrate Routing 已知障礙物分佈之基底層繞線 Chih-Wei Hsu 許智偉 碩士 中華大學 資訊工程學系碩士班 102 Due to the limit of a single routing layer and the existence of inevitable obstacles in flip-chip and PCB designs, single-layer obstacle-aware routing becomes an important issue in RDL routing and bus routing. In this paper, based on the construction of routability-driven constrained Delaunay triangulation for the terminals of the given nets, the corner of the given rectangular obstacles and the corners of a routing plane, an efficient flow-based approach is proposes for single-layer obstacle-aware routing. By using single-layer obstacle-aware routing with application to pre-assignment RDL routing in flip-chip designs and bus routing in PCB designs with the inevitable rectangular obstacles, the experimental results show that our proposed flow-based approach can successfully route all the given nets in a single- layer for the tested examples in reasonable CPU time. Jin-Tai Yan 顏金泰 2014 學位論文 ; thesis 51 zh-TW |
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碩士 === 中華大學 === 資訊工程學系碩士班 === 102 === Due to the limit of a single routing layer and the existence of inevitable obstacles in flip-chip and PCB designs, single-layer obstacle-aware routing becomes an important issue in RDL routing and bus routing. In this paper, based on the construction of routability-driven constrained Delaunay triangulation for the terminals of the given nets, the corner of the given rectangular obstacles and the corners of a routing plane, an efficient flow-based approach is proposes for single-layer obstacle-aware routing. By using single-layer obstacle-aware routing with application to pre-assignment RDL routing in flip-chip designs and bus routing in PCB designs with the inevitable rectangular obstacles, the experimental results show that our proposed flow-based approach can successfully route all the given nets in a single- layer for the tested examples in reasonable CPU time.
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author2 |
Jin-Tai Yan |
author_facet |
Jin-Tai Yan Chih-Wei Hsu 許智偉 |
author |
Chih-Wei Hsu 許智偉 |
spellingShingle |
Chih-Wei Hsu 許智偉 Obstacle-Aware Substrate Routing |
author_sort |
Chih-Wei Hsu |
title |
Obstacle-Aware Substrate Routing |
title_short |
Obstacle-Aware Substrate Routing |
title_full |
Obstacle-Aware Substrate Routing |
title_fullStr |
Obstacle-Aware Substrate Routing |
title_full_unstemmed |
Obstacle-Aware Substrate Routing |
title_sort |
obstacle-aware substrate routing |
publishDate |
2014 |
url |
http://ndltd.ncl.edu.tw/handle/89425834793757155317 |
work_keys_str_mv |
AT chihweihsu obstacleawaresubstraterouting AT xǔzhìwěi obstacleawaresubstraterouting AT chihweihsu yǐzhīzhàngàiwùfēnbùzhījīdǐcéngràoxiàn AT xǔzhìwěi yǐzhīzhàngàiwùfēnbùzhījīdǐcéngràoxiàn |
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1718414976104792064 |