VLSI Design of Single Pass Labeling and Feature Extraction for Image Object Detection

• Main Authors: Rong-chen Li, 李榮辰
• Other Authors: Ming-Hwa Sheu
• Format: Others
• Language: zh-TW
• Published: 2013
• Online Access: http://ndltd.ncl.edu.tw/handle/15245262170159993880

碩士 === 國立雲林科技大學 === 電子與光電工程研究所碩士班 === 101 === Connected components analysis is a very important step to a computer machine vision. In image processing, the foreground object segmented results are often less than ideal such that the segmentation will have a little broken. Since the correct rate of the foreground object segmentation seriously affects the feature extraction and subsequent image processing, many approaches use single pass labeling technique to detect all connected components of broken foreground objects. At the same time, the feature information of foreground objects can be obtained in labeling. These functions are required for real-time operation. The main contribution of this paper is to propose a fast single pass labeling algorithm that only has three label merging tables and a feature data collection table. The label reused methods is combined with three labels tables to reduce memory usage, through a few simple steps to check neighbors and determine current pixel. The experimental results show that our proposed algorithm can reduce the average CPU execution time of 12.8%. For the higher complexity of the image input, our method can reduce average of 38 % memory usage. In addition, this paper design a VLSI architecture based on our proposed algorithm. This architecture has been implemented on FPGA which can improve the average 23 % of operating frequency, and save about 20% FPGA logic gates usage.