| Summary: | 碩士 === 國立雲林科技大學 === 資訊工程系碩士班 === 101 === CUAS (Cache Utilization-Aware Scheduling) multicore scheduling system has been widely used in the existing SPEC CPU2006 benchmark. The main purpose is through classification and scheduling technology to enhance the overall instructions per cycle rate (IPC) and reduce the total execution time of SPEC CPU2006 benchmark. At last, users can achieve maximum performance requirements. However, CUAS multicore scheduling system is only used in the existing SPEC CPU2006 benchmark. If it applied to different platforms and different usage scenarios, it cannot verify CUAS multicore scheduling system practicality. How to use multicore CUAS scheduling system to achieve maximum performance is an important issue. The latest CiPE scheduling method, it is also only used in the existing SPEC CPU2006 benchmark to verify overall performance. If it applied to different platforms and different usage scenarios, it still cannot verify CiPE multicore scheduling system practicality. We study how to use and operate CUAS multicore system scheduling at different usage scenarios, and enhance the overall IPC or reduce total execution time. At last, it verifies its scheduling feasibility in different application scenarios. For this, we will use CUAS scheduling method at different application scenarios, and analyze performance improvements. To verify the effect of CUAS at different application scenarios, we conduct our experiments on an Intel Core2 Quad processor. We compare CUAS multicore scheduling method with the existing method CiPE, and test its performance respectively. The experimental results are shown in this paper, CUAS multicore scheduling methods at different application scenarios have up to 18% improvement.
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