Design and Implementation of a Low Standby Power Supply with Power Factor Correction and Synchronous Rectification

碩士 === 國立臺北科技大學 === 電機工程系所 === 101 === The purpose of the thesis is to develop a power supply with high efficiency and low stand-by power consumption. The power supply is constructed with an electromagnetic interference (EMI) filter which can efficiently reduce EMI issues caused by the system. T...

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Bibliographic Details
Main Authors: Wen-Yuh Chiang, 蔣文裕
Other Authors: 歐勝源
Format: Others
Language:zh-TW
Published: 2013
Online Access:http://ndltd.ncl.edu.tw/handle/8d3xxv
Description
Summary:碩士 === 國立臺北科技大學 === 電機工程系所 === 101 === The purpose of the thesis is to develop a power supply with high efficiency and low stand-by power consumption. The power supply is constructed with an electromagnetic interference (EMI) filter which can efficiently reduce EMI issues caused by the system. The pre-stage adopts a boost Power Factor Corrector to increase the power factor and decrease the current harmonic, thus improves the power quality and harmonic issue. The post-stage adopts a flyback converter circuit and operates with a synchronous rectification technique. As a result, the power consumption on the secondary circuit has been significantly reduced and the efficiency of power supply can be raised. When the output loading is tiny, the pulse-width modulation control circuit can close power factor corrector circuit and diminish the loss of power factor stage. In addition, by closing the pulse width modulation stage on the stand-by mode control circuit will greatly decrease the stand-by power consumption under no-load condition. In conclusion, the thesis implements a high efficient power supply with low stand-by power consumption of which specifications include input voltage range of 90~264 Vac and output of 19 Vdc / 90 W. The practice power supply is implemented to test and verify the compliance with the of EPA requirements and Energy Star regulations.