Development and Optimization of LVNMOS, HV and UHV NLDMOS Device Based on 0.35um BCD Process Technology

碩士 === 亞洲大學 === 資訊工程學系碩士班 === 101 === In this thesis, low voltage NMOS, high voltage and ultra high voltage NLDMOS device based on 0.35um BCD (Bipolar-CMOS-DMOS) technology had been studied. This project carried out under Nuvoton Technology Corporation, High Voltage and Intelligent Power Electronics...

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Bibliographic Details
Main Author: VASANTHA KUMAR V N
Other Authors: Gene Sheu
Format: Others
Language:en_US
Published: 2013
Online Access:http://ndltd.ncl.edu.tw/handle/00649722103190181712
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Summary:碩士 === 亞洲大學 === 資訊工程學系碩士班 === 101 === In this thesis, low voltage NMOS, high voltage and ultra high voltage NLDMOS device based on 0.35um BCD (Bipolar-CMOS-DMOS) technology had been studied. This project carried out under Nuvoton Technology Corporation, High Voltage and Intelligent Power Electronics Contract. BCD technology incorporates analog components (Bipolar), digital components (CMOS) and high-voltage transistors (DMOS) on the same die, and hence the name. By integrating three distinct types of components on a single die, this technology helps to reduce the number of components. Fewer chip components further reduces the area required on the board, thus driving down costs. The integration also helps reduce the parasitic losses than would typically be seen in a non-integrated solution. Power management is important and becoming highly growing market in semiconductor industry. BCD technology is one of the key enablers of this growth. The future growth of power management market is mainly driven by mobile computer market, infrastructure replacement, alternative energy market, and improving efficiency of existing electronics. However in the BCD process the main challenge is to get DMOS device either n-type or p-type with good breakdown and low on-resistance so that power dissipation should be small. Since in power management we use LDMOS device either for switching or control operation. LDMOS should have low on-resistance in order to have faster switching speed. The Lateral double-diffusion MOS (LDMOS) transistor is considered as device of choice when high voltage power device is integrated with low voltage CMOS devices. BCD process should scalable and cost effective, so that we need to have the single process flow which will cover wide range of BVD with best in class Ron. New design technologies have been employed to develop low voltage NMOS, high voltage and ultra high voltage NLDMOS for 0.35um BCD technology using single process. 5V LVNMOS, 40V HV and 800V UHV NLDMOS devices have been developed and optimized to obtain better electrical performance and to meet the specifications provided by Nuvoton Technology Corporation. The main important part of this project was to develop UHV 800V NLDMOS with best in class Ron. Synopsys TCAD simulation tools are used to develop and optimize process. Good process window is obtained for all devices. P-top engineering also being an important factor for Double-RESURF technology must be optimized to avoid charge balance issues. Also Triple-RESURF technology has been successful in obtaining lower On-state resistance without compromising on breakdown voltage. The 800V UHV device reported here is dual channel conduction LDMOS fabricated using an additional N-type low energy implant over P-top.