| Summary: | 碩士 === 國立臺灣科技大學 === 電子工程系 === 101 === In this thesis, a new lateral insulated-gate power device has been proposed. The structure design includes bulk-type and SOI-type. The simulation results show that this device achieves a larger on-current than both the power MOSFET and the TFET. The reason is the large series resistance in the drift region can be effectively alleviated by turning on the p+-anode/n-drfit junction of the device.
On the other hand, the relationship between the electric characteristics of the device and the gate-position has been discussed. For improving the on-current of the devices, the band-to-band tunneling near the p-well/n-drift junction or the electric field of drift region must be increased. Both the above conditions can be controlled by shifting gate-position, and there is a trade-off between the efficiency of band-to-band tunneling and the electric field of drift region. As a result, a proper gate-position should be employed to optimize the electric characteristics of the devices.
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