Summary: | 碩士 === 國立臺灣大學 === 資訊網路與多媒體研究所 === 101 === Even though heterogeneous system can enhance the computation and power efficiency, developing software on an heterogeneous multi-core platform is complicated, since it is relatively hard to debug programs and monitor the performance of the programs running on the actual system. In contrast, full system simulation is also a viable approach, but simulation speed and timing accuracy would be the two important issues which may need to balanced to satisfy the requirements from the developers. Furthermore, to support software development on a heterogeneous multi-core platform with proper modeling of the simulated hardware within a simulator, an unified simulation environment should also be provided.
In this thesis, we propose a new heterogeneous multi-core on multi-core simulation framework which is able to leverage the computing resource of multi-core processor on the modern computer. Our framework integrates the PQEMU processor emulator, the Ruby cache simulator and the iVerilog simulator, each is run as an independent process. The PQEMU processor emulator is the central part of our framework, it takes charges of coordinating each simulator and collecting performance information; the Ruby simulator is responsible for modeling memory sub-system; and the iVerilog simulator is responsible for modeling FPGA devices in the system. In order to enhance the emulation speed, we adopt event-based synchronization mechanism to maintain the consistency between each simulators. Furthermore, we also demonstrate how to build such a simulation environment by integrating existing tools.
The experimental results demonstrate the proposed framework is capable of predicting performance of applications on reconfigurable multi-core processor systems with sufficient accuracy and emulation speed. We provide two case studies of developing real world application with the proposed framework. the first case study demonstrates the capability of performance debugging for multi-threaded applications; the second case study demonstrates developing FPGA-accelerated applications on full software stacks.
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