Fault Simulation and Test Pattern Selectionfor Small Delay Defects Using GPU
碩士 === 國立臺灣大學 === 電子工程學研究所 === 101 === Testing for small delay defect (SDD) is gaining importance for product quality in modern nanometer technologies. Existing commercial timing-aware Automatic Test Pattern Generation (ATPG) tools and selection from timing-unaware test patterns are either sufferin...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2013
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| Online Access: | http://ndltd.ncl.edu.tw/handle/24888649841539919814 |