| Summary: | 碩士 === 國立清華大學 === 電機工程學系 === 101 === This thesis develops an electric vehicle (EV) switched-reluctance motor (SRM) drive with battery/super-capacitor hybrid storage and incorporated with grid-to-vehicle (G2V) and vehicle-to-grid (V2G) functions. The power circuit of the motor drive is formed by a bidirectional two-quadrant front-end DC/DC converter and a SRM asymmetric bridge converter. Through proper switching control, current and speed controls, good reversible driving and braking characteristics are obtained. The commutation advanced shift as well as voltage boosting are further applied to enhance the driving performance under higher speed. In addition, by augmenting the energy type battery storage with the power type super-capacitor storage, better overall storage utilization of an EV is achieved. Specifically speaking, the short and fast discharging/charging operations can be served by the super-capacitor bank. This is also beneficial in lengthening battery life.
In idle condition, the proposed motor drive schematic can be rearranged to construct the integrated power converter to perform the following functions: (1) G2V charging mode: a single-phase two-stage switch-mode rectifier (SMR) based charger is formed with power factor correction (PFC) capability. Its power circuit consists of a full-bridge boost SMR and a followed DC/DC buck converter. Moreover, a single-stage buck-boost SMR based charger can be established through proper arrangement; (2) Grid-connected V2G discharging mode: in addition to the local loads, the programmed real power can be sent back to the utility grid; (3) Autonomous V2H discharging mode: a single-phase three-wire (1P3W) inverter is established to generate the 60Hz 220V/110V AC sources to power home applications. Through applying the differential mode (DM) and common mode (CM) control approaches, good voltage waveform qualities are preserved under unknown and non-linear loads.
All the digital controls of the constituted power stages in the developed SRM drive system are realized using a common digital signal processor (DSP). Some simulated and experimental results are provided to verify its operation performances under various modes.
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